摘要
本文主要研究了LDPC码的理论。重点研究编译码算法并分析其性能,研究分析了LDPC码的软判决译码和硬判决译码两种算法,并通过MATLAB软件进行编译码仿真验证,综合比较考虑两种编译码算法的纠错性能和硬件实现复杂度,最后在硬件实现上选择了硬判决译码算法的大数逻辑译码算法,使用Verilog HDL语言在Quartus II软件设计工具上完成了LDPC编码器和译码器的设计与仿真验证,最后在FPGA硬件开发平台上硬件实现验证。
This paper studies the theory of LDPC codes. Focus research compiled code algorithm and analysis its performance, research analysis has LDPC code of soft judgment decoding and hard judgment decoding two species algorithm, and through MATLAB software for compiled code simulation validation, integrated compared consider two species compiled code algorithm of error correction performance and hardware achieved complex degrees, last in hardware achieved Shang select has hard judgment decoding algorithm of big number logic decoding algorithm, using Verilog HDL language in Quartus II software design tool done on LDPC encoder and decoder design and simulation, and hardware verification on FPGA hardware development platform.
出处
《电子世界》
2017年第12期125-127,共3页
Electronics World
基金
江苏省自然科学基金面上项目
编号:16KJB510012