高速互连串行协议RapiIO的性能优化

Performance optimization of high-speed interconnect serial protocol RapidIO

串行RapidIO是为了满足嵌入式行业对更高总线速度、带宽和可靠性的需求而发展起来的一种高性能分组交换技术。该技术不仅可以实现芯片间高速通信还可以实现板级间通信。在本文中所提出的研究成果是在对集成在数字信号处理器--多核的TMS320C6474中的串行互连协议Rapid IO性能优化的基础上提来的。研究结果表明,经过性能优化,Nwrite(写)和Swrite(流式写)这两种操作的传输速度都有所提升。研究结果还显示出,使用中断的方式发送一个数据包,不仅是最简单的方式,它还可以增加系统发送端的的稳定性。

Serial RapidIO is high performance packet switching technology ,it can meet the embedded industry demand for higher bus speed, bandwidth and reliability.The technology can not only achieve communication between chips within high-speed, but also can implement inter-plate communication.In this paper, the proposed research results are on the base that performance optimization of interconnect serial RapidIO which is integrated in the digital signal processor multi-core TMS320C6474.The results show that ,through performance optimization ,the transfer speed of Nwrite transaction and Swrite transaction has improved.And from the results , we also know that if we want to send a data packet , the interrupt method is the simplest and it can improve the stability of transfer system.But compared to the method of EDMA（Enhanced Direct Memory Access）,it＇s performance is not so good.