基于FPGA的千兆以太网实现

Realization of gigabit ethernet based on FPGA

随着技术的迅速发展,越来越多的工程应用对以太网嵌入式设备提出了需求,因此对以太网MAC层数据处理系统的研究具有重要的现实意义。本文介绍利用以太网物理层(PHY)芯片和FPGA实现的硬件千兆网模块。其中PHY芯片作为数据传输的高速节点,处理物理层数据,而FPGA完成对MAC层数据的处理。本文研究的方法结合了FPGA的强大处理能力和PHY芯片的驱动能力,比常规CPU+MAC层模块+PHY芯片的方式有更高的效率。本文通过实验测试验证了设计的可靠性与快速性。

With the rapid development of technology, more and more engineering applications have put forward the requirement of embedded Ethernet device. It is of great importance to research the data processing system of the Ethernet MAC layer. This paper describes a method which make use of PHY chip and FPGA to achieve the hardware gigabit network module. In this paper , PHY chip and FPGA respectively completes the data processing of PHY layer and the MAC layer.The method researched in this paper combines the powerful processing capabilitiy of FPGA and drive capability of PHY chip , which bring higher efficiency compared with the method using CPU,MAC layer module and PHY chip. In this paper, the reliability and rapidity of the design are verified by experiments.