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基于零极点追踪的高稳定性片内LDO电路设计 被引量:5

Design of a Highly Stable Chip-in LDO Circuit Based on Pole-Zero Tracking Frequency Compensation
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摘要 设计了一款无需片外电容的LDO电路,根据负载不断变化的问题,设计了零极点跟踪补偿电路,使产生的零点有效补偿电路的极点,保证了LDO环路的稳定性。基于TSMC 0.18μm Flash工艺完成电路和版图的设计以及流片。电路仿真以及实测结果表明在无片外电容的情况下,环路的相位裕度能够达到78.9°,达到高稳定的需求,最大负载电流能够达到100 m A,负载调整率为0.2 m V/m A。 In the paper, a LDO circuit without external capacitor is designed. According to the constant change of load, the zero-pole tracking compensation circuit is designed to make the zero effectively compensate the circuit pole and to ensure the stability of the LDO loop. Based on TSMC 0.18 μm flash process, the circuit and layout design and tape-out is completed. The circuit simulation and test results show that in the absence of external capacitor case, the loop phase margin can reach 78.9°, which achieves high stability requirements. The maximum load current can reach 100 m A, and the load regulation rate is 0.2 m V/m A.
出处 《电子与封装》 2017年第6期19-22,共4页 Electronics & Packaging
关键词 零极点跟踪 低压差线性稳压器 环路稳定性 无片外电容 pole-zero tracking low dropout regulator loop gain stability no off-chip capacitor
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