毫米波频段下MOSFET漏极电流噪声的统一模型

Unified noise model of MOSFET drain current for millimeter-wave applications

纳米级金属氧化物半导体场效应晶体管(MOSFET)精确的高频噪声模型是毫米波集成电路低功耗设计的重要基础,而现有的高频漏极噪声模型不仅没有融合器件的衬底效应和栅电阻效应,也没有充分考虑器件的频率和偏置依赖性。针对上述问题,基于纳米MOSFET器件的物理特性,并结合漂移扩散方程和有效栅极过载,建立统一表征强反区到弱反区的频率和偏置依赖性的漏极噪声模型,使之便于移植到先进设计系统(ADS)仿真设计。通过所建模型的仿真结果与实验测试结果进行比较,验证所建模型的准确性。同时比较所建模型对130nm和40nm MOSFET两种不同工艺器件的实用性,验证其对表征40nm MOSFET的毫米波噪声特性的优越性。

Accurate high-frequency noise model of nanoscale MOSFET is essential for the low-power design of millimeter-wave integrated circuit.However, the existing high-frequency drain-current noise models do not consider the effect of device substrate and gate resistance, and the dependence of frequency and bias.To solve this problem, based on the physical characteristics of nanoscale MOSFET devices and considering the drift-diffusion equation and the effective gate overdrive, this paper proposes unified drain noise models to characterize the frequency and bias dependence from the strong reverse region to the weak region.The models are effective to the application to advanced design system（ADS） simulation design by predicting the dependency of frequency and bias accurately.The simulation results of the model are compared with the experimental results to verify the accuracy of the model.At the same time, this paper compares the practicability of the models for two different process devices of 130 nm and 40 nm MOSFETs, and verifies that the millimeter-wave noise characteristic of the 40 nm MOSFET is superior.