基于FPGA的CMOS相机实时数据处理设计

Real-time data processing design of CMOS camera based on FPGA

针对CMOS图像传感器输出的LVDS串行数据在传输过程中因数据无法对齐引起误码率升高,图像分辨率降低问题,提出一种基于现场可编程门阵列FPGA的CMOS相机实时数据处理研究方案。采用VHDL硬件语言,对数据处理进行模块化设计,确保高速数据的正确采样,减少误码产生。经软件仿真及实测表明:该方案设计合理,系统运行稳定可靠,解决了高分辨率图像在高速传输中的数据校正问题,输出的图像轮廓清晰、无斑点。

Aiming at the problem that the LVDS serial data error rate rised output by CMOS image sensor due to the data can not be aligned and reduce the image resolution, a research program of CMOS camera real-time data processing based on FPGA is proposed. The design uses VHDL hardware language, the modular design of data processing to ensure the correct sampling of high speed data to reduce the error generated. The simulation results show that the scheme is reasonable and the system runs stably and reliably. It solves the problem of data correction in high speed transmission of high resolution images. The output image has clear contour and no speckle.