一种高效的混合内存布局机制与编码技术

Efficient Mechanism of Hybrid Memory Placement and Erasure Code

随着大数据和多核技术的发展,传统内存技术的发展已经远远不能满足大量数据密集型应用涌现所催生的内存计算需求。近年来,新型非易失性存储器(NVM)的兴起与发展为打破传统内存技术瓶颈提供了契机。相变存储器(PCM)作为一种典型的新型非易失性存储器(NVM),与传统内存DRAM各有优势,被认为是最有可能代替传统内存DRAM的存储器,在内存应用中具有很好的发展前景。基于DRAM和PCM的混合内存使得同时发挥DRAM与PCM各自的优势成为可能,故提出一种DRAM与PCM混合内存架构,设计针对混合内存布局的高效读写策略及数据迁移机制,并且在混合内存系统中应用纠删码来提高系统的可靠性。实验表明,此混合内存系统能够大大减少能耗,提高数据吞吐量,同时保证读写的可靠性。

With the rapid development of big data and multi-core technology, the growth of traditional memory technology, as a matter of fact, has been far away from satisfying the memory computing needs along with the emergence of a large number of data intensive applications. In recent years, the emergence and development of non-volatile memory （NVM） obviously provides an opportunity to break the bottleneck of traditional memory technology. As a typical emerging non-volatile memory, phase change memory （PCM） and traditional DRAM memory have their own advantages. What＇s more, it is widely considered to be most likely to replace traditional DRAM memory and has very good development prospects in the memory applications. Hybrid memory based on DRAM and PCM makes it possible to play the respective advantages of DRAM and PCM simultaneously. Therefore, in this paper, a hybrid memory architecture of DRAM and PCM was proposed, which is designed to evidently improve the system reliability of the hybrid memory system by using erasure code, based on the efficient reading, writing strategy and data migration mechanism. Experiments firmly show that the hybrid memory system can greatly reduce energy consumption, obviously improve the throughput, and ensure the reliability of reading and writing.