VLSI器件按比例缩小的发展趋势及挑战

Development and Challenge of VLSI Device Scaling Down

随着微电子技术的不断进步,集成电路进入超大规模集成电路(VLSI)时代,半导体器件的尺寸则达到了深亚微米量级,并且器件的尺寸还在进一步缩小。在器件缩小的过程中,出现了一些制约因素限制了器件的进一步发展,例如阈值电压减小的限制、杂质随机分布的影响、互连线延迟时间的影响等。只有很好的解决这些问题,电路的集成度才能有进一步发展的空间。

With the development of Microelectronics technology, the time of VLSI is coming and the feature size of transistor is continuously scaling down. Some factors limit the further scaling down, such as the limitation of shrink Vth, the delay time of interconnect, etc. The IC can be further developed only if these problems are well resolved.