基于双FPGA系统的高速全局动态重构设计与实现

Design and implementation of high-speed global dynamic reconfiguration based on dual-FPGA system

基于双FPGA芯片的可重构原型系统,提出一种系统高速全局动态重构设计方法。利用Xilinx Virtex-7系列FPGA的常规配置通道,使用一片规模较小的FPGA芯片作为重构控制器对大规模算法FPGA芯片实现全局动态重构。实验结果表明,系统重构时间小于60 ms,与常规FPGA逻辑下载方法相比,配置效率提高了2~3个数量级。

A system design method of high-speed global dynamic reconfiguration is proposed, which is based on a dual-FPGA reconfigurable prototype system. By virtue of the general configuration channel of Xilinx Virtex-7 Series FPGA, a small-scale FPGA chip is used as the reconfigurable controller to realize the global dynamic reconfiguration of large-scale algorithm FPGA chip . The experimental results show that the system reconfiguration time is less than 60 ms, and the configuration efficiency of the method is improved by 2 to 3 magnitude orders in comparison with the conventional FPGA logic downloading method.