可配置Cholesky分解矩阵求逆的FPGA实现

FPGA implementation of matrix inversion based on configurable Cholesky decomposition

在阵列信号抗干扰处理算法中,功率倒置法作为简单有效的干扰抑制手段被广泛应用,本算法的关键是求出对应协方差矩阵的逆矩阵。鉴于FPGA的速度优势,目前阵列信号抗干扰处理算法多采用FPGA实现。本研究针对常用阵列信号抗干扰系统的实现,设计出一种基于FPGA的Cholesky矩阵分解模块,可适用于3~8阶正定Hermitian矩阵的求逆,配置简单方便。测试结果表明,在不影响计算精度的情况下,该方法节省了FPGA中的硬件资源。

As a simple and effective interference suppression algorithm, power inversion algorithm is widely used in various array signal processing algorithms. The key of the algorithm is to find the inverse matrix of corresponding covariance matrix. Given the high speed of FPGA, array signal anti-jamming processing algorithm is mostly accomplished by FPGA at present. In order to realize the commonly used system of array signal anti-jamming system, a Cholesky matrix decomposition based on FPGA is designed, which can be applied to the inversion of 3 ~8 positive definite Hermitian matrixes. Test results show that this algorithm can save hardware resource without affecting calculation precision.