复杂电路功耗自测试方法研究与仿真

Research and Simulation of self test method for complex circuit power consumption

对电路分布路径低功耗内建自测试,在电路故障检测方面具有重要意义。电路功耗内建自测时,需对电路构造距离序列进行寻优,传统方法主要通过对电路的X位做低功耗填充,无法对电路构造距离序列进行寻优,导致故障测试结果不准确。提出无关位填充的电路低功耗内建自测试方法。将测试向量与扫描链中响应数据分块相容,待测电路的功耗划分为动态功耗和静态功耗,依据划分结果获取电路节点的动态功耗,计算出连续输入测试矢量序列的电路功耗,得到电路的平均功耗和峰值功耗,获取待测电路时序逻辑之间的数据传递关系,融合于改进细胞自动机构造预确定距离序列,利用遗传理论对该距离序列进行寻优,得到最佳预确定测试序列,完成电路低功耗内建自测试,达到电路故障检测的目的。仿真结果表明,所提方法检测电路故障精确度高。

In this paper, a built - in self - testing method of low - power consumption of circuit is proposed based on independent bit stuffing. Firstly, test vector and response data segmentation in scan chain were integrated and power consumption of circuit under testing was divided into dynamic power consumption and static power consumption. Then, according to the division result, dynamic power consumption of circuit node was acquired and circuit power con- sumption with consecutive input of test vector sequence was worked out to obtain average power consumption and peak power consumption of the circuit. Then, data transmission relationship among sequential logic of circuit under testing was acquired. Integrated with the modified structure of cellular automaton, distance sequence was confirmed. Genetic theory was used to carry out optimization for the distance sequence and best pre - confirmed test sequence was obtained. Finally, the self - testing was completed to achieve goal of fault detection of circuit. Simulation results Indi- cate that the method has high precision of detecting circuit fault.