摘要
以Toffoli门族为基础,采用ESOP综合方法设计了一种4位可逆二进制加/减法器。引入了"共享控制位提取"的优化方法,并提出一种"传输线复用"的新思路,对可逆电路进行了优化。利用Quartus II软件进行了电路仿真,结果表明,该加/减法器的性能指标达到设计目标。该电路的量子代价、辅助输入、垃圾输出等性能指标均有较大程度的优化。
Based on Toffoli gates,a 4 bit reversible binary adder/subtractor was designed by using ESOP synthesis method. The optimization method of extracting shared control bits was introduced. A new idea of transmission lines multiplexing was proposed,and then the reversible circuit was optimized. The proposed adder/subtractor was simulated by the Quartus II software. The simulation results showed that the performances of adder/subtracter met the design goal. The performances such as quantum cost,auxiliary input and garbage output of adder/subtracter were optimized greatly.
出处
《微电子学》
CSCD
北大核心
2017年第4期487-489,494,共4页
Microelectronics
基金
国家自然科学基金资助项目(61102075)
模拟集成电路重点实验室基金资助项目(6142802011503)
重庆市重点产业共性关键技术创新专项项目(cstc2016zdcy-ztzx0038)