基于DSP+FPGA的仪表着陆机载接收机检测仪

DSP + FPGA Based Detector for Airborne Receiver of Instrument Landing System

基于DSP+FPGA结构开发一种仪表着陆机载接收机检测仪,用于解决传统检测设备存在的携带不便、效率低、成本高的问题。以DSP+FPGA结构为核心配合外围信号合成、接口转换、模拟信号采样和人机交互等电路组成了仪表着陆机载接收机检测仪的电路系统。解决了仪表着陆地面台站信号模拟、基于FPGA的ARINC429协议转换和基于DSP的检测策略设计与数据分析等问题。结果表明,该检测仪能够实现对仪表着陆机载接收机的检测,使用灵活方便。

To solve the inefficiency and high cost problems of the traditional detection equipment, an airborne receiver detector was developed for Instrument Landing System （ILS）. Taking the DSP ＋ FPGA architecture as the core, the circuit system of the ILS airborne receiver detector was composed together with the circuits of peripheral signal synthesis, interface converters, analog sampling and human-computer interaction. Such problems as signal simulation of instrument landing ground station, the ARINC429 protocol conversion based on FPGA, the design of detection strategy and data analysis based on DSP, were solved. The detector is able to detect the ILS airborne receiver, which is easy and flexible to use.