一种防止错误锁定的延迟锁相环的设计

A design of preventing false lock delay phase-locked loop

延迟锁相环在集成电路中有着广泛的应用,能够实现不同时钟的相位同步和占空比校正的功能。本文首先分析了延迟锁相环的基本工作原理,并基于锁相环在锁定过程中容易出现错误锁定的现象,通过增加脉冲宽度检测电路,优化延迟锁相环系统,提出了一种防止错误锁定的延迟锁相环。最后给出了延迟锁相环在DDR存储器系统中的典型应用,并对延迟锁相环进行了流片后的测试。

Delay phase-locked loop has been widely used in the integrated circuit. This paper first analyzes the basic working principle of phase-locked loop, and based on phase-locked loop prone to errors in the process of lock locking phenomenon, by adding the width of pulse detection circuit, optimization of delay phase-locked loop system, puts forward a way to prevent false lock delay phase-locked loop. Finally gives the delay phase-locked loop in the DDR memory system of typical applications, and has carried on the performance test of delay phase-locked loop in the silicon after tap-out.