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基于FPGA声学多普勒流速剖面仪的信号处理机设计

Signal Processor Design Based on FPGA for Acoustic Doppler Current Profiler
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摘要 针对声学多普勒流速剖面仪的高速信号采集和处理对运算实时性与易升级的需求,提出一种基于现场可编程门阵列(FPGA)的软硬件协同设计方法。阐述声学多普勒剖面仪的测流原理,选择FPGA作为单一的信号处理器,使用Verilog HDL语言描述易于用硬件实现的模块,如同步采集、低通滤波及复数相关运算等计算量大的模块。采用FPGA内部的MicroBlaze软核作为系统的中央处理器,进行流程控制、分支判断以及调用硬件模块来控制系统回波信号的采集、处理和存储。实验结果表明,FPGA信号处理的实时性满足系统要求,且具有较高的精确性。 Aiming at the real-time requirements and easy upgrode feature for high-speed signal acquisition and processing in Acoustic Doppler Current Profiler (ADCP),a hardware and software co-design method based on Field Programmable Gate Array (FPGA) is proposed.This paper expounds the principle of current profiler and chooses the FPGA as a signal processor.Using Verilog HDL language to describe some modules which are easy to use hardware to implement,such as synchronous data acquisition,filtering and complex correlation calculation.This paper chooses the FPGA's MicroBlaze soft core as the CPU system,operating process control,determining branch and invoking hardware modules to control echo signal of acquisition,processing and storage.Experimental results show that the real-time feature of FPGA signal processing meets the requirement of the system,and it has high accuracy.
出处 《计算机工程》 CAS CSCD 北大核心 2017年第1期67-71,共5页 Computer Engineering
基金 国家自然科学基金(61303139)
关键词 声学多普勒流速剖面仪 现场可编程门阵列 信号处理 硬件加速 复数运算 signal processing hardware acceleration complex operation
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