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基于SPI接口针对采样保持电路失调的校准电路设计

Calibration Circuit Design Based on SPI Interface for Offset of Sample and Hold Circuit
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摘要 针对时间交织ADC中S/H电路存在的失调失配误差,设计了一种基于SPI接口的失调校准电路,包括失调误差补偿电路以及12位电流舵DAC,并设计了SPI接口电路。通过SPI接口电路手动控制12位校准DAC,产生校准S/H电路的补偿电压,从而达到校准S/H电路失调失配误差的目的。12位DAC采用9+3分段式电流舵结构,具有分辨率高、非线性误差较小、面积和功耗适中的优点。利用Modelsim仿真软件对设计的SPI接口电路进行了功能和时序仿真,并进行了FPGA硬件实现,验证了其正确性。最后将SPI接口与S/H电路进行级联仿真,实现了对S/H电路中补偿电压的手动调整。所设计的基于SPI接口的校准电路具有灵活性强、精度高、扩展性好等优点。 Aiming at the offset mismatch error of S/H circuit in time interleaved ADC,an offset calibration circuit based on SPI interface was designed,which includes the offset error compensation circuit,the 12 bits current steering DAC and the SPI interface circuit.the 12 bits calibration DAC was manually controlled to generate the compensation voltage that calibrate the S/H circuit by the SPI interface,so as to calibrate the offset mismatch error of S/H circuit.The 12 bits DAC adopted 9+ 3 segmented current steering structure,which has the advantages of high resolution,small nonlinearity error,and moderate area and power consumption.The simulation software of Modelsim was used to complete the SPI interface circuit function and timing simulation,and the hardware implementation of FPGA was carried out,which verified the correctness of the SPI interface.At last,the SPI interface and S/H circuit were cascaded simulated,and the manual adjustment of the compensation voltage in the S/H circuit was realized.The calibration circuit based on SPI interface has the advantages of high flexibility,high precision,good expansibility,and so on.
机构地区 合肥工业大学
出处 《仪表技术与传感器》 CSCD 北大核心 2017年第9期38-42,共5页 Instrument Technique and Sensor
基金 安徽省科技攻关项目(JZ2014AKKG0430) 中央高校基本科研业务费专项资金项目(2014HGCH0010)
关键词 SPI 时间交织A/D转换器 S/H电路 VERILOG HDL 手动校准 FPGA SPI time interleaved A/D converter S/H circuit Verilog HDL manual calibration FPGA
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