一种改进输入级结构的轨至轨运算放大器设计

Design of a rail-to-rail operational amplifier with improved input stage structure

基于0.18μm CMOS标准工艺设计了一种改进输入级结构的轨至轨运算放大器电路。该电路由输入级电路、共源共栅放大电路、共源输出电路及偏置电路组成。通过引入正反馈的MOS耦合对管将输入级电路改进为预放大电路,然后对其进行了详细分析,利用Cadence软件对电路进行仿真。仿真结果表明本文结构的低频直流开环增益可以达到80 dB,比相同参数下的普通结构高20 dB左右。相位裕度达到73o,共模输入电压范围满足全幅摆动,共模抑制比低频时可以达到107 dB。

Based on 0.18 pan CMOS standard process, a rail-to-rail operational amplifier circuit which can improve the input stage structure was designed.The circuit was composed of the input stage circuit, the cascode amplifier circuit, the common source output circuit and the bias circuit. The input stage circuit was improved as a pre amplifier circuit by introducing the MOS coupling with positive feedback, a detailed analysis was carded out, and the circuit was simulated by using Cadence software. The simulation results indicate that the circuit has a DC open-loop gain of 80 dB, which is about 20 dB higher than the ordinary structure under the same parameters. The phase margin is 73°, the common-mode rejection ratio （CMRR） is 107 dB at low frequency, and the common-mode input voltage range also meets the full swing.