摘要
在数据写入FIFO过程中,由于时钟偏移会引起数据多写或者少写,产生数据滑位现象。本文针对FIFO数据传输时出现的数据接收故障,进行分析排查,采用乒乓缓存、全局时钟等可靠性设计方案,解决了数据缓存FIFO中的滑位问题,保证了数据传输的正确性。
In the process of writing data in the FIFO,the clock offset will cause writing more or less bits, which generates the data sliding problem. Based on the data reception fault in the FIFO data transmission, The paper analyzed the problem and adopted reliability design of using the ping-pang data cache and global clock to solve the problem of the bits sliping in the data cache to ensure the validity of the data transmission.
出处
《数字技术与应用》
2017年第8期42-43,共2页
Digital Technology & Application
关键词
数据滑位
可靠性
乒乓缓存
时钟偏移
bits sliping
reliability
ping-pang data cache
clock offset