晶体管厄利电压对功放电路静态电流影响实例分析

Study of Early Voltage Transistor Effect on Quiescent Current in Power-Amplifier Integrated Circuits

通过对某款功放电路的静态电流随电源电压增加而快速增大的实例,分析了晶体管厄利电压对静态电流变化的影响。通过对同款电路在不同工艺平台中测试结果的对比,分析了静态电流随电源电压变化过快的现象跟晶体管参数厄利电压的相关性,并分析了浅结工艺用于制造功放电路的缺点。分析结果表明通过优化或改变工艺条件(即增加基区结深),使晶体管厄利电压增大,可以解决该款功放电路静态电流随电源电压增大增速过快的问题。

Based on the case of a given power-amplifier integrated circuit in which quiescent current increases dramatically with supply voltage, the effect of Early transistor voltage on quiescent current is analyzed. By comparing the test results of the same circuit in different process platforms, the relativity between Early voltage and changes of quiescent current and the detriments of using shallow junction process in the manufacture of power-amplified circuits are analyzed. Results show that optimization or change of process that increases the Early transistor voltage will perfectly solves the problem.