基于iRazor时序错误检测与纠正电路改进与应用

Improvement and application of timing error detection and correction circuit based on iRazor

随着集成电路尺寸缩小和低电压技术的发展,集成电路会出现在工艺、电压、温度及老化等方面的变化(Variation),会使得当前集成电路的时序发生变化,经过各级寄存器的逐渐累积后使得电路发生时序错误(Timing Error),当前时序错误检测与纠正技术正得到越来越多的研究。文中基于SMIC 65nm工艺,针对当下最新的iRazor结构,完成全定制只需要额外增加三个晶体管的iRazor FF结构的硬件实现并完成时序错误纠正电路的改进和优化设计。在此基础上,设计一款FIR数字滤波器作为验证电路,使EDAC技术应用于该验证电路,仿真结果显示在0.6V工作电压、12.5MHz工作频率下能够实现时序错误检测与纠正。

As the size of integrated circuit is becoming more smaller and the development of low voltage technology,the chip may have variation on process,voltage,temperature and aging,it may cause timing error when the timing variation accumulate after passing all level registers. Currently,the research of timing detection and correction is becoming more and more popular. Based on the process of SMIC 65 nm and the latest iRazor structure,this paper finished the hardware implementation of the iRazor FF which only need add three extra transistors,then finished the improvement and optimization of timing error correction circuit. After that,it designed a FIR filter as the verification circuit,let the EDAC technology make a application on it,the simulation result show that the verification circuit can detect timing error and then correct it automatically on 600 m V at 12. 5MHz.