超薄SiO_x钝化层所导致的半导体-绝缘体-半导体异质结高频隧道电容溢出现象

The high-frequency tunnel capacitance overload phenomenon of semiconductor-insulator-semiconductor heterojunction caused by the ultra-thin interfacial layers

从高频电容电压特性测试中发现的隧道电容溢出现象出发,研究了具有超薄钝化层的半导体-绝缘体-半导体(semiconductor-insulator-semiconductor SIS)异质结器件界面处独特的电荷存储特性.从SIS 1 MHz频率下的CV特性可知,当外加偏压小于V_T(voltage tunneling)时,SIS界面处于耗尽状态,而当外加栅压超过V_T之后,SIS的高频电容将远超仪器量程趋于无穷大,可概括称为隧道电容溢出现象.从SIS的XPS(X-ray photoemission spectroscopy)深度剖析结果可知,具有不同厚度的ITO(indium tin oxide)的SIS器件界面钝化层所含元素组分并无差别.但从TEM(transparent electron microscope)的结果来看,钝化层厚度随ITO的增加而增加,分析表明不同ITO厚度的SIS所对应V_T值不同的主要原因是由于钝化层厚度的不同.通过对实验结果的分析,本文给出了隧道电容溢出现象的载流子输运的能带模型.结果表明,隧道电容溢出是由于超薄钝化层无法使大量电子在界面处积累所致.且同一器件隧道电容溢出现象是可重复的,不会对器件带来物理损伤,这是采用直接磁控溅射工艺制备SIS异质结太阳电池稳定性的体现.

The SIS （semiconductor-insulator-semiconductor） structure heterojunction derived from the MOS （metal-oxide- semiconductor） devices, and inherit the advantages of low cost, simple structure, stable performance and high theoretical efficiency, which drew tons of attention for solar cell and integrated circuit applications researches. SIS device consist of TCO （transparent conduction oxide） layer, ultra-thin oxide layer and silicon substrate, in which the carriers can tunnel through the oxide layer when the thickness of the interface oxide layer is reduced to 1-5 nm. Inside the SIS solar cell, the ultra-thin passivation layer has multiple functions including tunneling contact and buffer the crystalline lattice mismatch. Capacitance reflects a device＇s ability to charge and discharge, and the capacitance voltage （CV） characteristic is critical in the estimate of the passivation quality no matter in the high-low frequency method or DLTS （deep level transient spectroscopy system） method, and the passivation quality manifest as interface state density （Dit）. When examining the high frequency （1 MHz） CV characteristic of the SIS which was fabricated by depositing ITO upon n-type silicon directly by RF magnetron sputtering, it is found that once the applied voltage （Vg） exceeds a certain value VT （tunneling voltage）, the differential capacitance value of the device would far beyond the range of the instrument and tends to infinity, which can be summarized as tunnel capacitance overload phenomenon （TCOP）. As the description and explanation of this phenomenon have not been found in previous studies, the high-frequency TCOP of the SIS heterojunction with ultra-thin interfacial layers was investigated in details in this paper. The current-voltage characteristics of the SIS devices were obtained from the solar simulator and shown good photovoltaic conversion efficiency. The built-in electric field of the SIS with different ITO thickness was obtained by fitting the CV curves, which was measured by the Keysight E4980A CV system. The XPS depth profiling showed that the composition and percentage content of the interface, including In, Sn, O, Si, and the oxide silicon compound of Si20, SiO, Si203, SiO2which can be summed as SiOx （1 ~〈x~〈2）. The TEM images showed that the thickness of the SiOx layer increases with the thickness of ITO layer, and the VT in TCOP is apparently linked to the SiOx thickness. When the applied Vg exceed VT, a huge amount of electrons would enter the Ec of the silicon surface, unlike the MOS with thick and well passivated insulator layer, the ultra-thin SiOx layer can＇t hold these mass of electrons at the SIS interface, so the electrons would directly tunnel through the SiOx into the ITO layer and the TCOP appears. Capacitance voltage characteristics are critical for estimating the properties of heterojunction interfaces, and high frequency CV is indispensable for measuring the Dit. The existence of the TCOP is the main reason why other methods which based on the CV characteristics are difficult to estimate the interface state. But from another point of view, the TCOP is repeatable in the same device, which implied that the solar cells that fabricated by the directly depositing ITO thin films on n-type silicon is stable.