流水线技术在用FPGA实现高速DSP运算中的应用

Application of Assembly-Line Technique in Realization of DSP High-speed Operation with FPGA

现代数字信号处理需要处理大量的数据 ,迫切需要高速DSP运算。随着超大规模可编程器件FPGA CPLD和流水线技术的迅速发展 ,使得高速DSP运算的快速编程实现成为了可能。文章讲述了流水线技术的原理和结构 ,提出了在FPGA芯片中应用流水线技术 ,完成高速数字信号处理运算的思路、方法与具体实现。通过软件综合比较 ,测试数据表明应用流水线技术大大提高了DSP的运算速度。

Modern digital signal process needs processing a great deal of data, and high-speed calculation is required urgently. With the rapid development of VLSI programmable device such as FPGA/CPLD and assembly-line technique, the fast programmable design method of high-speed DSP becomes possible. The principles and stiuctares of assembly-line technique are described. The paper gives the idea and method to use pipeline technique into designing digital signal process (DSP) with FPGA/CPLD and proves that it is absolutely possible that high-speed DSP operation can be realized with assembly-line technique.