摘要
本文介绍了一种高压高重频脉冲发生装置的研制过程,装置主要由脉冲信号源,驱动电路和功率放大电路组成。本文详述使用FPGA设计脉冲信号源的方法,驱动电路中脉冲整形电路的设计思路和在功率放大电路中降低电路寄生参数的手段。装置在1MHz重频下工作,在50Ω负载上测得脉冲前沿低于14ns。
This paper introduces the development process of a High-repetition-frequency high-voltage narrow pulse source. This equipment includes pulse signal source, drive circuit and power amplification circuit. The article describes in detail about the methods of design pulse signal source with FPGA, pulse shaping circuit in the drive circuit design and reduce the parasitic parameters of circuit in the power amplifier circuit. When Device work at 1MHz repetition frequency, the rising edge of the high voltage pulse keep in 14ns on 50Ω load.
出处
《电气技术》
2017年第10期61-64,共4页
Electrical Engineering
基金
特殊环境机器人技术四川省重点实验室开放基金资助项目(13zxtk07)
