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Harris角点检测的FPGA快速实现方法 被引量:9

Real-time Harris corner detection method based on FPGA
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摘要 针对Harris角点检测算法计算量大导致实时性差的难题,提出了一种基于FPGA的快速Harris角点检测技术。利用FPGA并行处理的特点,将整幅图像分为两块后并行处理,对其中分解得到的每一块图像采用流水线处理,并将流水线结构分为导数生成器、高斯滤波、角点响应R值计算、非极大值抑制四级,且对流水线每一级中涉及到的复杂乘法运算转换为精简的移位及加法或减法运算,最终实现对目标的实时角点检测。实验结果表明,对于分辨率为1 024×1 024的图像,达到了每帧6.809 ms的角点提取速度,与基于FPGA传统结构的Harris角点检测算法相比,速度提高了近一倍,极大提升了算法的实时性,具有较强的工程实用价值。 In order to solve the real-time problem of Harris corner detection algorithm,this paper developed a fast implementation based on FPGA. The implementation divided an image into two pieces to process it in parallel to take full advantage of the parallel architecture of FPGA,and manipulated each piece based on the pipeline. The pipeline included four stages which were derivative generator,Gaussian filtering,measuring corner response,and non-maximum suppression. It used the shifts and additions/subtractions in place of the complicated multiplications in each stage,thus achieved the real-time Harris corner detection algorithm. The experimental results show that the processing speed of the proposed method achieved up to 6. 809 ms per frame for 1 024 × 1 024 images. This speed improves by about 2 times compared with the Harris corner detection algorithm based on conventional FPGA structure. The proposed algorithm greatly improves the real-time performance of the corner detection and has a widely practical application.
出处 《计算机应用研究》 CSCD 北大核心 2017年第12期3848-3851,共4页 Application Research of Computers
基金 国家自然科学基金资助项目(Y37106A18N)
关键词 HARRIS角点检测 FPGA 并行结构 流水线结构 Harris corner detection FPGA parallel structure pipeline structure
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