红外焦平面CTIA型读出电路的设计研究

Design of CTIA Readout Circuit for IRFPA

为了适应红外焦平面(IRFPA)高像素的趋势,设计出面积更小、性能更优的像元电路,选择电容反馈跨阻放大器(CTIA)作为像元电路的电路结构,在CTIA中运算放大器基于共源共栅结构,采用积分电容可选的模式来调整积分时间,并基于电路高像素的需求,优化电路,减小面积.在此基础上,搭建模拟信号通路进行仿真研究,绘制版图,并进行后仿,为读出电路的正确性、可靠性提供保障.优化后的像元电路面积为18μm×18μm,可选积分电容分别为60 fF和400 fF,后仿得到的信号通路输出摆幅常温下为2.03 V,低温下为1.52 V,且低温下的积分噪声为213.6μV,满足设计需求.

In order to adapt to the trend of high pixel demand of infrared focal plane （IRFPA）, it is necessary to design a smaller size and better performance pixel circuit. A capacitive transimpedance amplifier （CTIA） was selected as the circuit structure of the pixel circuit. The cascode structure was adopted for the CTIA, and the integration time was able to be adjusted by using the optional integrated capacitors. The pixel circuit was modified to reduce the area for meeting the need of high pixel. In addition, the analog signal chain was set up and analyzed by simulation. Its layout was drawn and then it was post simulated to provide a guarantee of accuracy and reliability of the readout circuit （ROIC）. After optimization, the area of the pixel circuit is 18 μm × 18 μm, and the optional integrated capacitors are 60 fF and 400 fF respectively. The output swing of the analog signal chain is 2.03 V at room temperature and 1.52 V at low temperature,obtained in the post- simulation. The output integrated noise at low temperature is 213.6 μV, which is lower than the former structure,and can meet the requirements in the post-simulation.