摘要
本论文中讨论了如何在内部底层逻辑电路和接口电路的限制下,使手持设备达到高速运行、精确传输的要求.通过BDC（Multipath Delay Commutator）时序方式,对输入数据、输出数据以及数据的位倒序存取提出一种单通道的时序方式,在满足存储器可行的全速读取时序内,加快傅里叶算法的运算速度.利用Radix-4的时间抽取FFT算法,通过Verilog编程软件以及Xilinx ISE开发板,实现算法的仿真.实验结果表明对于90纳米内的CMOS集成电路来说,该算法能够高效的完成64点FFT,从而嵌入到WiMAX信道标准中.
This paper explores how to make handheld devices meet the need of high speed and accuracy transmission under the restrain of fundamental logic circuit and interface circuit. Through MDC, this paper presents a single-channel timing method on input data, output data, and reverse access to data so as to satisfy the memory feasible full speed reading time sequence and speed up the operation of the Fourier algorithm. The FFT algorithm was extracted using radix-4 time. Through the Verilog programming software and Xilinx ISE development board, the simulation of algorithm can be reached. Experimental results show that for CMOS integrated circuits within 90 nm , the algorithm can efficiently complete 64 points FFT, embedded in WiMAX channel standards.
出处
《四川工商学院学术新视野》
2017年第4期35-38,共4页
Academic New Vision of Sichuan Technology and Business University
