摘要
为了椭圆曲线密码算法的高效性实现,提出了底层有限域算法设计方法。基于对二进制有限域运算的研究,提出并行模乘算法和基于欧几里得算法的右移求逆算法,从而提高有限域算法的效率。根据该算法,提出了ECC硬件电路实现方法,并用Verilog RTL进行逻辑设计,最终在Xilinx的XC7A100T FPGA硬件平台上验证实现。通过仿真测试、综合验证和时序后仿真的结果分析,所设计电路的时钟频率可以达到100MHz,运算速度可达2.23ms,证明了设计的有效性和可行性。
To realize the elliptic curve cryptography(ECC) effectively,the design method of binary finite filed algorithm was presented.By the study on the binary finite fields,paralleled modular multiplication algorithm and inversion algorithm which was based on Euclidean algorithm,were presented to improve the effectiveness of binary finite filed algorithm.ECC hardware implementation design was proposed based on the algorithm,and converted to logic designs using Verilog RTL,finally it worked on the XC7A100T FPGA platform of Xilinx.By the pre-simulation,synthetical verification and analyzing the results of post simulation,the clock frequency of the designed circuit could reach up to 100 MHz and the operating rate attained to 2.23 ms which demonstrated the feasibility and the effectiveness of the project.
出处
《信息技术》
2017年第12期115-120,共6页
Information Technology
基金
山东省科技计划项目(2013YD01038)
关键词
椭圆曲线密码
二进制域
FPGA
模乘
模逆
elliptic curve cryptography
GF ( 2 m)
FPGA
modular multiplication
modular inversion