考虑时滞因素时单元串联式静止无功发生器的非线性自抗扰控制

Nonlinear Active Disturbance Rejection Control of Static Var Generator with Cascaded Unit Considering Time-delay Factor

为了满足基于单元串联式静止无功发生器(SVG)的动态和抗干扰性能要求,设计了一种新型高阶自抗扰控制(ADRC)算法,并应用于单元串联式静止无功发生器,设计了最速控制综合函数安排过渡过程,并作为非线性状态误差反馈(NLSEF)控制律的控制算法。结果表明:所提控制算法采用非线性最速控制综合函数作为跟踪微分器(TD)和NLSEF的控制算法,解决了串联式SVG无功电流高频振荡和滤波差的问题。MATLAB仿真和样机实验结果表明,自抗扰控制方法动态过渡过程时间比比例谐振(PR)控制算法少100 ms以上;ADRC控制算法能避免滤波效果差及积分饱和的问题。研究结果验证了所设计的ADRC算法具有较好的动态性能和较强的抗干扰性。

In order to meet the urgent requirements of dynamics and anti-interference performance of cascaded unit static var generator （SVG）, a new kind of high order active disturbance rejection controlling algorithm was designed and applied to cascaded unit static var generator. Meanwhile, a time optimal controlling （ADRC） functional synthesizer was designed and used as nonlinear state error feedback （NLSEF） controlling method. The results show that the proposed control algorithm uses the nonlinear fastest-speed control synthesis function as the control algorithm of tracking difference （TD） and NLSEF, which has solved the problem of high frequency oscillation and filter difference of tandem SVG reactive current. The results of MATLAB simulation and prototype experiments show that the transient process of SVG system which adapts the high-order active disturbance rejection control （ADRC） algorithm proposed by this paper has been shorten by over 100 ms compared with proportional resonant control, and ADRC algorithm can avoid poor filtering and integral saturation during transition. On the basis of the simulation and experimental results, the faster dynamic response and stronger robustness can be obtained and verified with the designed ADRC algorithm.