基于FPGA的GPS接收机的架构设计与研究

Architecture design and research on GPS receiver based on FPGA

针对目前采用ASIC芯片的GPS接收机的算法固化、硬件架构难以改变和扩展性差的缺点,提出了一种基于FPGA的GPS接收机的架构设计。该GPS接收机采用嵌入软核处理器的现场可编程阵列器件(FPGA)芯片上完成GPS信号捕获、跟踪、解算等一系列操作和运算,大大提高了GPS接收机的集成度、扩展性和兼容性。经过测试表明,该GPS接收机在单频、单点的条件下能够可靠实现符合预期的定位功能,具有一定的工程实用性。

Aiming at the shortcomings of the algorithm of GPS receiver using ASIC chip,the hardware architecture was difficult to change and the difference was poor,this paper presents a FPGA receiver based on FPGA architecture design.The GPS receiver uses a field programmable array device(FPGA) embedded in the soft-core processor to complete GPS signal acquisition,tracking,solution and a series of operations and operations,greatly improving the GPS receiver integration,scalability and compatibility.The test shows that the GPS receiver can meet the expected positioning function reliably under the condition of single frequency and single point,and has certain engineering practicability.