基于可编程硬件的NFV数据包加速处理结构

Enabling Fast Packet Processing for NFV via Programmable Hardware Acceleration

针对网络功能虚拟化(Network Function Virtualization,NFV)在通用服务器中部署的处理性能受限问题,该文提出了一种基于硬件加速的虚拟网络功能(Virtual Network Function,VNF)处理结构:FARD(Function Adaptive and Resource Dividable hardware structure).通过可编程的包头解析器和动作处理器,FARD可实现任意L2/3/4层功能实例的硬件加速处理;通过动态可分割的匹配表结构,FARD支持不同功能实例间的资源动态分配和隔离.基于NetFPGA-10G的实验结果表明,对比基于纯软件实现的VNF,FARD加速结构提升了近60倍的包处理吞吐率.

To improve the forwarding performance of NFV（ Network Function Virtualization） in general server, this paper comes up with a hardware based VNF（ Virtual Network Function） packet processing acceleration structure which is called FARD（ Function Adaptive and Resource Dividable hardware structure）. FARD can implement the hardware acceleration of any function instance on the L2/3/4 layer with programmable parser and action processor. And FARD also supports the dynamic resource allocation and function isolation between different instances with dynamic division on match table. The results based on the NetFPGA-10 G platform show that the FARD acceleration structure increases by nearly 60 times in packets processing throughput compared with VNF which is only implemented by software.