摘要
基于0.18μm CMOS工艺,提出了一种为UHF RFID阅读器中VCO供电的低噪声、高电源抑制比LDO。根据LDO的基本结构,对噪声和电源抑制比进行了分析。采用两级结构,通过预调制级和低通滤波器来降低输出噪声,采用电源负反馈结构为带隙基准电路提供独立电源,并在功率输出级增加减法电路来提高电源抑制比。仿真结果表明,该LDO在100kHz和1 MHz处的输出噪声分别为26nV/Hz^(1/2)和6.7nV/Hz^(1/2),10kHz和1 MHz处的PSRR分别为-82dB和-71.6dB。在3.3V电源电压供电时,LDO消耗的静态电流为300μA。
A low noise high PSRR low dropout voltage regulator（LDO）based on 0.18μm CMOS process for VCO power supply in UHF RFID reader was presented.According to the basic structure of LDO,the noise and power supply rejection were analyzed.A two-stage structure of pre-regulation circuit and low pass filter was adopted to reduce the output noise.A bandgap reference powered by negative feedback architecture and a power drive stage with a subtractor were used to improve the PSRR of LDO.The simulation results showed that the LDO＇s output noise was 26 nV/Hz^1/2 at 100 kHz and 6.7 nV/Hz^1/2 at 1 MHz.The PSRR was up to -82 dB at 10 kHz and -71.6 dB at 1 MHz while drawing 300μA static current at a 3.3 Vpower supply.
出处
《微电子学》
CSCD
北大核心
2017年第6期733-738,共6页
Microelectronics
基金
国家自然科学基金资助项目(61306034
61302005)
