期刊文献+

一种带2阶温度补偿的负反馈箝位CMOS基准电压源 被引量:3

A Negative Feedback Clamp CMOS Bandgap Voltage Reference with 2nd Order Temperature Compensation
下载PDF
导出
摘要 根据带隙基准电压源工作原理,设计了一种带2阶温度补偿的负反馈箝位CMOS基准电压源。不同于带放大电路的带隙基准电压源,该基准电压源不会受到失调的影响,采用的负反馈箝位技术使电路输出更稳定。加入了高阶补偿电路,改善了带隙基准电压源的温漂特性。电路输出阻抗的增大有效提高了电源抑制比。基于0.18μm CMOS工艺,采用Cadence Spectre软件对该电路进行了仿真,电源电压为2V,在-40℃110℃温度范围内温度系数为4.199×10^(-6)/℃,输出基准电压为1.308 V,低频下电源抑制比为78.66 dB,功耗为120μW,总输出噪声为0.12mV/(Hz)^(1/2)。 A negative feedback clamp CMOS bandgap reference with 2nd order temperature compensation technique was designed on the basis of bandgap reference's principle.Different from the bandgap reference with an operational amplifier which was easily affected by the offset,the negative feedback clamp technique enabled the output more stable.The 2nd order temperature compensation technique had improved the temperature characteristics of the existing circuits.Also,a high output resistance had improved the power supply rejection ratio.The circuit was designed in a 0.18μm CMOS process,and it was simulated with the Cadence Spectre tools.The simulation results showed that the bandgap reference had a temperature coefficient below 4.199×10-(-6)/℃,and an output reference voltage of 1.308 Vwhen the temperature varied from -40℃ to 110℃and the supply voltage was 2 V.At low frequencies,the PSRR was 78.66 dB.The power consumption was 120μW,and the total output noise was 0.12 mV/(Hz)-(1/2).
出处 《微电子学》 CSCD 北大核心 2017年第6期774-778,共5页 Microelectronics
基金 安徽省科技攻关项目(JZ2014AKKG0430) 中央高校基本科研业务费专项资金资助项目(2014HGCH0010)
关键词 带隙基准电压源 负反馈 2阶温度补偿 Bandgap voltage reference Negative feedback 2nd order temperature compensation
  • 相关文献

参考文献5

二级参考文献33

  • 1刘帘曦,杨银堂,朱樟明.基于MOSFET失配分析的低压高精度CMOS带隙基准源[J].西安电子科技大学学报,2005,32(3):348-352. 被引量:8
  • 2张红南,曾健平,田涛.分段线性补偿型CMOS带隙基准电压源设计[J].计测技术,2006,26(1):35-38. 被引量:4
  • 3秦波,贾晨,陈志良,陈弘毅.1V电源非线性补偿的高温度稳定性电压带隙基准源[J].Journal of Semiconductors,2006,27(11):2035-2039. 被引量:13
  • 4RAZAVIB.模拟CMOS集成电路设计[M].陈贵灿,程军,译.西安:西安交通大学出版社,2002:319-320.
  • 5RAZAVI&模拟CMOS集成电路设计[M].西安:西安交通大学出版社,2002:309—327.
  • 6YANG L, SHI Y F, LI L, et al. CMOS bandgap voltage reference with 1.8 V power supply [C] // Proc 5th Int Conf ASIC. Beijing, Chino. 2003~ 611-614.
  • 7LEUNG K N, MOK P K T, LEUNG C Y. A 2 V 23- btA 5.3 ppm/°C curvature compensated CMOS bandgap voltage reference [J]. IEEE J Sol Sta Circ, 2003, 38(3): 561-564.
  • 8PAUL R, PATRA A, BARANWAL S, et al. Design of second-order sub-bandgap mixed-mode voltage reference circuit for low voltage applications [C] // 8th Int Conf VLSI. Kolkata, India. 2005: 307-312.
  • 9SHENG J, CHEN Z, SHI B. A 1 V supply area effective CMOS bandgap reference [C] //Proc 5th Int Conf ASIC. Beijing, China. 2003 :619-622.
  • 10KER M D, CHEN J S, CHU C Y. New curvature- compensation technique for CMOS bandgap reference with sub-l-V operation I-J] // IEEE Trans Circ Syst II, 2006, 53(8): 667-671.

共引文献20

同被引文献14

引证文献3

二级引证文献2

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部