基于UVM的DBF系统模块级可重用验证平台的实现

The Implementation of Universal Verification Platform for Sub-model of DBF System Based on UVM

针对雷达系统中FPGA验证系统搭工作量大,验证覆盖率低等现存问题,基于FPGA+DSP结构中FPGA模块结构的特点,采用UVM(通用验证方法学)搭建通用模块的验证平台,大大提高验证平台重用性、验证覆盖率和验证效率.最后,以多路复用分数延迟滤波器模块为例,编写测试激励和参考模型,实现对多路复用分数延迟滤波器的快速验证.

In the radar system, DBF（digital beam forming） system usually adopts FPGA-I-DSP, Aimed at the FPGA in DBF system, based on UVM（Universal Verification Methodology）, we established a Universal Verification Platform for DBF FPGA model, to enhance the verification platform reusability and verification coverage ratio, the verification platform can improve verification efficiency. Finally, based on the universal verification platform, by means of add test stimulations and reference model to verify an fractional delay filter model in DBF system.