一种新型跟踪式逐次逼近模数转换器

A New Tracking SAR ADC

为了降低功耗和复杂度,采用复用量化器结构,而不需要传统结构中的减法和数模转换器模块(DAC),实现一低功耗简单的跟踪式模数转换器.量化器采用8bit电容单调式切换的逐次逼近模数转换器(SAR ADC).另外为了进一步提高效率,SAR ADC中的比较器采用时间域比较器实现.经过在90nm CMOS工艺下仿真验证,设计的ADC采样速度16 MHz,8倍过采样率(OSR).经过数字滤波处理,输入信号频率为227kHz时,可以实现59.6dB的信噪失真比(SNDR),功耗28.5μW,品质因数(FOM)18.4fJ/step.另外,由于转换过程主要在数字域实现,这种ADC便于移植到更先进的工艺,并获得更好的效率.

This paper presents a tracking analog-to-digital converter （ADC）. By reusing the quantizer, the tracking AYX2 no long needs subtraction and digital-to-analog （DAC） module that the conventional structure needs. This technique could decrease the power consumption and the chip area. The quantizer adopts 8-bit monotonic switching scheme successive-approximation-register （SAR） AIX2. In addition, to further increase efficiency, a time domain comparator is used to replace the analog domain comparator. This ADC is simulated in a 90 nm CMOS technique. It works with 16MHz sampling rate, 8 over sampling rate （OSR）. It achieves 59. 6dB SNDR for an input signal around 227 KHz with the help of a simple digital low pass filter. Counting in the filter, it consumes 28. 5 μW power under 1-Vsupply. The figure-of-merit （FOM） is 18. 4 fJ/STEP. In addition, such topology bring us the advantage of easy design migration among technology nodes for seeking greater efficiency improvement.