相控阵天线校准单元高效代码实现技术研究

The efficient implementation technique of measuring amplitude and phase for calibration unit of array antenna

校准单元是相控阵天线的重要组成部分,其实现算法需要占用较多的FPGA资源。本文从宇航应用出发,采用ACTEL的SX-A系列A54SX72A芯片(该芯片只有6036个逻辑模块,没有内部乘法器),通过优化下变频,低通滤波和锁相环实现算法,实现高精度幅相测量功能。仿真结果表明,在不降低测量精度的前提下,A54SX72A芯片的逻辑资源占用率仅为77%,相比传统算法节约近50%。

calibration unit is a very important component for Phased Array antenna.The implemented algorithm needs to occupy more resources of FPGA.Based on the aerospace application,this paper chosen SX-A family A54SX72A of ACTEL(This chip has only 6036 logic module and has not the embedded multiplier).through optimizing Digital Down Converter,low-pass filter and PLL algorithm.this paper implemented to measure the mplitude and phase for hign precision.The simulation results showed that under the condition of not reducing the accuracy of measurement,A54SX72A chip logic resources occupancy rate was only 77%,saved almost 50%,compared with the traditional algorithm.