基于FPGA实现IPSec的优化研究

Research on Optimization of IPSec Based on FPGA

随着互联网的高速发展,在互联网上通信的安全性显得越发重要。论文提出了IPSec协议的硬件体系结构,并对此结构进行了详细的分析。重点介绍了此协议中的加密算法AES和哈希算法SHA-256,对这两种算法的运算过程进行了描述,在基于FPGA的实现上进行了优化设计,在保证功能正确的前提下有效提升了这两种算法的性能。

With the high-speed development of the Internet,the security of communication on the Internet is more and more important. This paper proposes the IPSec protocol hardware architecture,and makes a close analysis of the architecture. Meanwhile,this paper focuses on the AES algorithm and SHA-256 algorithm,and describes the operation process of the two algorithms.In this paper,the optimization design is carried out on the two algorithms to ensure the correct function and improve the performance of the algorithms on FPGA.