原位生长包/芯/包层界面的氧化硅基阵列波导光栅

A Silica Arrayed Waveguide Grating with In-Situ Deposition of Cladding-Core-Cladding Layers

阵列波导光栅（AWG）是密集波分复用光通信和芯片光谱仪中的核心芯片,提出了一种新的AWG制造方法,在制作芯层时采用原位生长包层/芯层/包层三明治结构,采用化学气相沉积（CVD）工艺原位生成芯层和上下包层的界面,避免了原来分别生长芯层、包层时光刻、去胶工艺在芯、包层界面处带来的颗粒物和有机污染,从而有效减少了对器件性能影响最大的芯、包层界面处的缺陷。详细介绍了改进后的工艺流程和参数,在硅衬底上制作了工作波长为800~1 050 nm的AWG芯片并将其作为验证芯片。通过对工艺改进前后的两组AWG芯片进行对比测试,证明了新工艺具有成品率高、性能稳定的优点。

Arrayed waveguide grating （AWG） is the core chip in dense wavelength division multi- plexing optical communication and chip spectrometers. A new fabrication method for AWG was proposed. The in-situ deposition of cladding-core-cladding layers sandwich structure was adopted in the fabrication of the core layer. The boundaries between core layer and cladding layers were fabricated with in-situ de- position in chemical vapor deposition （CVD） process. Instead of depositing core and cladding layers se- parately in usual process, the new fabrication method avoided the particulate and organic contamination caused by the photolithography and degumming process at the core layer and cladding layers boundary. It effectively reduced the defects at the core layer and cladding layers boundary which had the greatest im- pact on the performance of the device. The improved process flow and parameters were introduced in de- tail. An AWG chip with the operating wave length of 800-1 050 nm was fabricated on Si substrate as the verification chip. Through the comparison test of two groups of AWG chips before and after the improved process, it is proved that the new technology has the advantages of high yield and stable performance.