摘要
本文从非线性元件带来的相位误差、幅值误差和采样的同步误差两个方面分析了合并单元的误差来源,从硬件原理和软件设计两方面探讨了合并单元校验仪的研制,从绝对延时、相对延时等项目介绍了合并单元校验的原理和方法。
This article analyzes its sources of error from two aspects : phase error as well as amplitude error from nonlinear elements and synchronous error caused by sampling, and discusses the method of production of calibration instrument for merging unit in hardware and software. At last, the principles and methods of verifying the merging unit are introduced from theabsolute time delay and relative time delay.
出处
《湖南电力》
2018年第1期59-62,共4页
Hunan Electric Power
关键词
合并单元
误差
校验
merging unit
error
verify