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片上网络容错技术研究 被引量:4

Research on Fault Tolerant Technology for Networks-on-Chip
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摘要 片上网络是一种全新的片上计算机体系结构,对片上网络的研究主要包括拓扑结构、路由算法、服务质量、交换机制、拥塞控制、能耗和容错等突出问题,其中对容错方法的研究一直是研究的重点。在软件改进和硬件改进方面,容错方法可以分为路由算法容错和路由器结构容错两类。分析当前已有容错方法的适用情况、实现原理和实现方法,并且分析其延迟、吞吐率、功耗等性能及其优缺点,对容错方法的现状进行剖析并且为容错方法的下一步研究提供研究方向。 Network-on-chip is a new computer architecture on chip,the study of network-on-chip mainly includes topological structure,routing algorithm,service quality,switching mechanism,congestion avoidance,energy consumption,fault tolerant and so on,and the study of fault tolerant methods is the most important research issue.This paper divided fault tolerant methods into two types:tolerant fault by algorithms and tolerant fault by architecture,from the aspects of software improvement and hardware improvement.This paper analyzed the application conditions,implementation principles and implementation methods of the existing falut tolerant routing algorithms,analyzed the performance of communication latency,throughput and power consumption,and advantages and disadvantages of the existing falut tolerant methods,dissected the situation of the existing falut tolerant methods and offered a possible research orientation.
出处 《计算机科学》 CSCD 北大核心 2018年第3期305-310,共6页 Computer Science
基金 国家自然科学基金项目(61474087)资助
关键词 片上网络 容错 路由算法 性能分析 Network-on-Chip Falut tolerant Routing algorithm Performance analysis
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