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基于UVM的基带射频接口电路的验证 被引量:3

Verification of baseband RF interface circuit based on UVM
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摘要 针对UVM验证方法学的高效性,结合UVM可重用性的特点,搭建层次化的模块级验证平台,对基带射频接口电路的功能进行验证。验证分析表明,基带射频接口硬件电路架构移植于UVM环境中,不仅提高了代码覆盖率和功能覆盖率,而且大幅提升了验证效率。同时通过DC(Design Compiler)对硬件RTL约束后,得到射频接口电路接收通路的面积为0.3 mm^2,功耗为39 mW;射频接口电路发送通路的面积为0.5 mm^2,功耗为58 mW。 Abstrct : This paper based on the efficiency of UVM verification methodology, and combined with the characteristics of UVM reusability. In order to verify the function of baseband RF interface circuit, it need build hierarchical modular verification platform.The verification analysis show that baseband RF interface hardware circuit framework can be transplanted to UVM environment, which not only code coverage and functional coverage can be increased, but also the efficiency of verification can be substantially improved.At the same time, the hardware RTL is constrained by DC, which the area of receiving path of RF interface circuit is 0. 3 mm^2 and power consumption is 39 mW can be obtained. The area of transmission path of RF interface circuit is 0. 5 mm^2 and power consumption is 58 mW can be obtained.
作者 徐飞 秦水介
出处 《电子技术应用》 2018年第3期11-14,共4页 Application of Electronic Technique
关键词 UVM 基带射频 功能验证 DC综合 功耗 UVM baseband RF functional verification DC synthesis power consumption
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