摘要
利用溶液法的浸渍提拉工艺制备了以有机聚甲基丙烯酸甲酯(PMMA)为介质层、非晶铝铟锌氧化物(a-AIZO)为沟道层的顶栅共面结构薄膜晶体管(TFT),研究了沟道层退火温度对TFT性能的影响机理。结果表明:较低退火温度(如300和350℃)下处理的沟道层中存在未彻底分解的金属氢氧化物,其以缺陷态形式存在于TFT沟道层内或沟道层/介质层界面处,对导电沟道中电子进行捕获或散射,劣化TFT的迁移率、电流开关比以及亚阈值摆幅。综合来看,退火温度高于400℃下制备的a-AIZO适用于TFT器件的沟道层,相应的器件呈现出较高的迁移率(大于20cm2/(V·s))、较低的亚阈值摆幅(小于0.5V/decade)以及高于104的电流开关比。
In this work,the top-gate and top-contact thin film transistors(TFT)were prepared with dip-coated amorphous aluminum-indium-zinc-oxide(a-AIZO)as the active layer and poly(methyl methacrylate)(PMMA)as the gate insulator layer.And then the effect of annealing temperature of the active layer on the TFT's performance was studed.It is found that the impurities in the active layer due to the incompleted thermal decomposition of dehydroxylation under a lower post-temperature(e.g.300 and 350℃)not only strongly obstruct the formation of metal oxide,but also produce the trap states in the active layer and at the active-layer/dielectriclayer interface.This trap state makes electron carriers be trapped or scattered,resulting in deterioration of the electrical performance of devices including the mobility,on/off current ratio and subthreshold swing.Overall,the a-AIZO TFTs fabricated at annealing temperature higher than400℃exhibit optimum device characteristics,with a high saturated mobility(〉20 cm2/(V·s)),a small subthreshold swing(〈0.5 V/decade),and on/off current ratio of higher than 104.
出处
《半导体光电》
CAS
北大核心
2018年第1期86-90,共5页
Semiconductor Optoelectronics
基金
国家自然科学基金项目(61504031)
贵州省科学技术基金项目(黔科合LH字[2014]7388)
贵州民族大学科研基金项目(15XRY009)
贵州省教育厅青年成长人才项目(黔教合字[2016]155)
关键词
薄膜晶体管
非晶氧化物半导体
浸渍提拉法
有机介质层
沟道层退火温度
thin-film transistor
amorphous oxide semiconductors
dip coating
organicdielectric layer
annealing temperature of active layer