高结温无延迟的VSC-HVDC阀合成试验方法

Undelayed Synthetic Test Method with High Junction Temperature for VSC-HVDC Valves

为了实现对电压源换流器型高压直流输电(VSC-HVDC)换流阀稳态应力和直流双极短路暂态应力的综合考核,提出了一种高结温无延迟的VSC-HVDC阀合成试验方法及其电路拓扑。无延迟的特点保证了注入带直流偏置的短路大电流时换流阀开关器件处于最高稳态结温状态,同时该方法有效地降低了换流阀的试验成本及电源需求。首先,分析了VSC-HVDC换流阀稳态运行和直流双极短路故障时的电应力。其次,结合应力等效机理,提出了高结温无延迟的VSCHVDC合成试验方法,并阐述了其运行机理。最后,通过搭建仿真模型和试验平台进行了验证,结果证明了提出的合成试验方法及其电路拓扑的可行性和有效性。

In order to achieve the comprehensive assessment of the steady stress and the transient stress by DC side bipolar fault of voltage source converter Based high voltage direct current （VSC-HVDC） valves, an undelayed synthetic test method with high junction temperature for VSC-HVDC is proposed. The switching devices of the converter valves is guaranteed to be at the highest junction temperature state when the short circuit current is injected. At the same time, the costs and power requirements of the converter valves test have been effectively reduced by proposed method. Firstly, the electric stress of steady-state operation and DC side bipolar fault of VSC-HVDC valves is studied. Secondly, based on the stress equivalence mechanism of VSC-HVDC valves, an undelayed synthetic test with high junction temperature for VSC-HVDC valves is presented. Thirdly, the test operation mechanism is expounded. Finally, the validity of the synthetic test method and its circuit topology are verified by simulation model and test platform.