一种低功耗32 nm CMOS分数-N频率合成器设计

Low Power 32 nm CMOS Fraction-N Frequency Synthesizer

为了减少频率合成器的工作能耗,提出了一种新型低功耗的分数-N频率合成器。该合成器消除了电源电压、工艺偏差和温度变化(PVT)对电容的影响,能够产生中等精度时钟脉冲震荡且具有较低的芯片面积。该合成器通过采用频率-电流转换电路,将电路的输出频率与电容比成正比。采用32 nm CMOS工艺对提出电路进行了制作。测试结果显示,相比其他类似合成器,提出合成器的功耗和面积更低,总面积仅仅为0.006 5 mm2,在0.9 V电源电压条件下,功率仅损耗为108μW。使用4 MHz参考时钟时,输出频率范围为18 MHz^156 MHz,频率分辨率为0.8 MHz。

In order to reduce the energy consumption of frequency synthesizer,a novel low power fractional-N frequency synthesizer is proposed.The synthesizer eliminates the influence of the power supply voltage,processes deviation and temperature change（PVT） on the capacitance,that a moderate precision clock pulse oscillation can be produced and a low chip area can be gotten.By adopting the frequency current conversion circuit,the output frequency of the circuit is proportional to the capacitance ratio.The proposed circuit is realized by using CMOS32 nm technology.Test results show that,compared to other similar synthesizer,the power consumption and area of the synthesizer are lower,the total area is only 0.006 5 mm^2,under 0.9 V supply voltage conditions,the power loss of 108 μW only.When using the 4 MHz reference clock,the output frequency range is 18 MHz ~ 156 MHz,the frequency resolution is 0.8 MHz.