采用电流复用拓扑的宽带收发一体多功能电路

A Broadband Multifunctional Transceiver Circuit Using Current Reuse Topology

基于标准的GaAs赝配高电子迁移率晶体管（PHEMT）单片微波集成电路（MMIC）工艺设计并制备了一款宽带收发一体多功能电路芯片。该多功能芯片包含了功率放大器、低噪声放大器和收发开关。放大器采用电流复用拓扑结构实现了低功耗的目标。收发开关采用浮地结构避免了使用负电源。芯片在14~24 GHz工作频率的实测结果显示：接收支路噪声系数小于3.0 dB,增益大于18 dB,输入及输出电压驻波比（VSWR）均小于2.0,1 dB压缩点输出功率大于0 dBm,直流功耗为60 mW;发射支路增益大于21 dB,输入输出VSWR均小于1.8,1 dB压缩点输出功率大于10 dBm,直流功耗为180 mW。芯片尺寸为2 600μm×1 800μm。该多功能收发电路的在片测试结果和仿真结果一致,性能达到了设计要求。

A broadband multifunctional transceiver circuit chip was designed and prepared based on the standard Ga As pseudomorphic high electron mobility transistor（ PHEMT） monolithic microwave integrated circuit（ MMIC） process. The multifunctional chip contains a power amplifier, a low noise amplifier and two transceiver switches. The current reuse topology structure was used by the amplifiers to achieve low power consumption. The floating ground structure was used by the transceiver switch to avoid the use of negative power. The actual measurement results of the chip at the operating frequency of 14-24 GHz show that for the receiver branch,the noise figure is less than 3. 0 dB,the gain is more than 18 dB,the input and output voltage standing wave ratios（ VSWRs） are less than 2. 0,the output power at 1 dB compression point is more than 0 dBm,and the DC power consumption is 60 m W; for the transmitter branch,the gain is more than 21 dB,the input and output VSWRs are less than 1. 8,the output power at 1 dB compression point is more than 10 dBm,and the DC power consumption is 180 mW. The chip size is2 600 μm× 1 800 μm. The multifunctional transceiver circuit achieves a good agreement between on-wafer measured results and simulated results,with its performance meeting the design requirements.