一种对相频检测器反馈延时设计的研究

A Studies of Feedback Delay for Phase Frequency Detector

在电荷泵锁相环中,边沿触发相频检测器对反馈延时有较高的设计要求,相频检测器有效输出脉冲宽度与时钟周期的不匹配会引入相位检测风险,严重影响电荷泵锁相环设计。为降低这一风险的影响,采用UMC 40 nm工艺搭建测试结构,验证说明如何在信号脉冲宽度和信号建立时间方面设计合理延时,得出仿真数据,最终验证反馈延时对相频检测器的重要性。

The paper introduces feedback delay of phase frequency detector, and illustrates mismatching between effective pulse width and clock period leads to phase detecting risk. The risk seriously influences the requirement of charge pump PFD design. The major factor is how to control pulse width and make a correct setup time to reduce this risk. The paper then explores the simulation data with the test bench of UMC 40 nm foundry, finally points out the importance of feedback delay with PFD.