摘要
普通数字延时滤波器虽然结构简单,但系数计算过程复杂,在延时参数快速变化时,系数更新速度无法满足实时性要求,在工程应用上受限制。采用Farrow结构数字延时滤波器能够更加灵活高效地进行分数延时滤波,延时参数改变时,无需重新计算滤波器系数,更容易在现场可编程门阵列(FPGA)上实现。介绍了一种Farrow结构数字延时滤波器,提出采用基于对称结构的滤波器系数求解方法,并经过加权优化,获得最终Farrow滤波器的系数。系数计算过程中,通过对设计所得Farrow滤波器延时精度和误差的分析,调整加权因子的取值和滤波器阶数,进而提高延时精度。计算机仿真结果证明了加权对称系数求解Farrow滤波器系数方法的有效性和实用性。
Although traditional digital delay filters have simple structures,the calculation of coefficients is complicated and their update speed can not satisfy constantly changing requirement when delay value changes,which results in limited engineering application. The digital delay filter with Farrow structure can be used for fractional delay filtering flexibly and efficiently without recalculation for filter coefficients when delay value changes,and is easier to be implemented on Field Programmable Gate Array( FPGA). This paper introduces a Farrow structure digital delay filter and proposes a method for calculating filter coefficients based on symmetric structure. Furthermore,weighted optimization strategy is used to obtain the final solutions for filter coefficients. In the process of coefficient calculation,by analyzing the delay accuracy and error of designed Farrow filter,the weighting factor and filter order can be adjusted to improve delay accuracy. Finally,validity and practicability of the new method for the Farrow filter coefficients design is proved by computer simulation.
作者
王伟
WANG Wei(Southwest China Institute of Electronic Technology,Chengdu 610036,China)
出处
《电讯技术》
北大核心
2018年第5期601-606,共6页
Telecommunication Engineering
基金
国家重点研发计划资助(2017YFC1404900)