片上网络与系统域网络的协同设计探索

Co-design of on-chip networks and system interconnection networks

为进一步提升网络性能,在处理器内集成网络设备逐渐成为趋势,但随着片上处理器数目以及高维度系统域网络对片间互连端口数目需求的不断增加,传统的集成集中式Router的结构(如IBM Blue Gene/Q)将面临可扩展性、片上流量均衡及片间接入公平性等问题。基于此,提出了片上网络和片间系统域网络协同设计方法,以分布式的虚拟Router架构替代传统集中式的Router架构,一方面通过将片间网络接口分布在片上网络,为处理器核提供均衡、公平的网络服务,另一方面省去了集中式Router中的交叉开关,进而消除了片间交换的扩展性限制,降低了CPU集成片间网络设备的成本。从协同路由、协同网络接口布局和协同参数设置三个方面对该协同设计方法进行了系统性的探索,并通过对TMesh网络架构进行实例研究,给出了虚拟Router架构的性能和可行性分析。

It is pointed that to further improve network performance,integrating network devices into processors becomes an important trend,but with the increase of the on-chip processor number and the number of interchip interconnected ports required by high dimensional system interconnection networks,the traditional processor architecture,IBM Blue Gene/Q,for example,will face the problems of scalability,on-chip traffic balancing and intership access fairness,etc. In consideration of this,a method for co-design of on-chip networks and system interconnection networks is proposed,which on one hand,provides balanced and fair network service to processing cores by distributing network interfaces into the on-chip network,and on the other hand,solves the scalability issue and reduces processor implementation cost by avoiding using crossbar in the centralized router. This proposed cooperative design method is systematically investigated from three aspects of collaborative routing,collaborative deployment of network interfaces,and collaborative parameter setting. Also,a case study on the network architecture of TMesh is conducted,and the performance and feasibility of the virtual router architecture are analyzed.