摘要
高清视频信号存储模块是电子内窥镜视频存储的核心,本研究设计基于串行高级技术接口(SATA 2.0)协议的高清电子内窥镜视频存储,并将循环冗余校验(CRC-32)算法用于高速数据传输协议的物理层和链路层,使得数据在信道中传输时,避免受到各种各样的干扰而出现误码。最后,编写Verilog逻辑实现CRC-32校验算法,进行仿真测试,并在Kintex-7开发板平台上进行验证性测试。在速率高达250 MB/s时,基于FPGA的高清视频信号存储模块的误码率低于10-12,满足电子内窥镜视频存储的高实时性、高带宽、低误码率的需求,具有良好的市场应用前景。
High-definition（HD） video signal storage module is the core of electronic endoscope video storage. Herein a HD electronic endoscope video storage is designed based on serial advanced technology attachment（SATA 2.0） protocol, and cyclic redundancy check-32（CRC-32） algorithm for error checking is used in the physical layer and link layer of high-speed data transmission protocol, aiming to avoid various of interferences and errors during the data transmission in the channels. Finally,Verilog logic is programmed to achieve CRC-32 codec for simulation test, and the verification test is performed on Kintex-7 development board platform. With the bit error rate less than 10-12 at the speed up to 250 MB/s, the designed HD video signal storage module based on FPGA which has a good market prospect meets the requirement for high real-time, high bandwidth and low bit error rate.
作者
杨晓玲
刘文龙
YANG Xiaoling;LIU Wenlong(Shaanxi Province Medical Equipment Quality Supervision and Inspection, Xi＇an 710065, China;Xi＇an Institute of Optics and Precision Mechanics, Xi＇an 710119, China;University of Chinese Academy of Sciences, Beijing 100049, China)
出处
《中国医学物理学杂志》
CSCD
2018年第6期695-700,共6页
Chinese Journal of Medical Physics
基金
中科院光谱成像技术重点实验室开放基金(LSIT201715G)
关键词
高清电子内窥镜
FPGA
串行高级技术接口协议
CRC-32
链路层
high-definition electronic endoscope
FPGA
serial advanced technology attachment protocol
cyclic redundancy check- 32
link layer
