基于FPGA的多频耳声导抗测试系统的设计

Design of multi-frequency ear acoustic immittance testing system based on FPGA

为了实现多频探测音的声导抗测试方法,提升声导抗诊断灵敏度,设计一种基于FPGA的多频耳声导抗测试系统。采用FPGA芯片协调多模块同步工作,实现上位机通信、探测音产生、气压改变、声压和气压信号采集、数据缓冲和传输等核心功能,由上位机软件对数据实时处理和鼓室导抗图显示。系统对多名正常听力成年人采用1 000 Hz高频和226 Hz低频探测音进行测试试验,结果稳定并与理论分析一致,表明该系统设计正确和工作可靠。

A multi-frequency ear acoustic immittance testing system based on FPGA is designed to realize the acoustic immittance testing method for multi-frequency probing sounds and improve the sensitivity of acoustic immittance diagnosis. The FPGA chip is used to coordinate multiple modules′ synchronous working,so as to realize the key functions such as communication with the upper computer,generation of probing sounds,air pressure variation,acquisition of sound pressure and air pressure signals,and data buffering and transmission. The software of the upper computer is used to perform real-time data processing and tympanogram display. A test in which several adults with normal hearing were tested with the 1000 Hz high frequency probing sounds and 226 Hz low frequency probing sounds was carried out by the system. The testing results are stable and consistent with those of the theoretical analysis,which indicates the correctness and reliability of the designed system.