基于可编程硬件的有状态网络功能硬件加速架构

Programmable Hardware-Based Stateful Network Functions Hardware Acceleration Architecture

为了解决无状态加速器对有状态虚拟网络功能(Virtual Network Function,VNF)的加速效果较差的问题,该文提出了一种基于可编程硬件的有状态功能处理加速架构(Stateful Function Processing Acceleration Architecture,SFPA).SFPA通过为数据平面提供有状态处理单元(Staeful Processing Unit,SPU),将数据包处理任务卸载到数据平面上.此外,SFPA能够为多个VNF独立地分配加速资源,并采用资源分配优化算法降低硬件资源开销,提高了加速架构的灵活性.基于Net FPGA-10G平台的实验结果表明,SFPA架构下,VNF的吞吐量是采用DPDK加速时的2.9倍,是无状态硬件加速器的1.7倍;资源分配优化算法的优化率最高可达41.9%.

It＇s far less effective for the stateless accelerator to accelerate the stateful network function. In order to solve the problem,this paper presents a programmable hardware-based stateful network function acceleration architecture which is called Stateful Function Processing Acceleration（ SFPA） architecture. Providing the Stateful Processing Unit（ SPU） to the data plane,SFPA can offload the data processing task to the data plane. In addition,SFPA can allocate the acceleration resources to multiple VNFs independently,decrease hardware cost and improve the flexibility of the acceleration architecture with the resource allocation optimization algorithm. Results of the experiments which are based on the Net FPGA-10 G platform showthat the throughput of VNF is 2. 9 times faster than that of DPDK,and 1. 7 times faster than that of stateless hardware accelerator in the SFPA. The optimal rate of resource allocation optimization algorithm is up to 41. 9%.